From http://www.gamearchive.com You may distribute this document freely as long as this header remains intact. Donated by Bryan Edewaard POKEY (stands for: POts & KEYs) - Atari #CO12294 Pokey is a custom IC developed by Atari for use in the Atari 400/800 Home Computers, but they eventually found their way into many classic Atari coin-ops, and are more flexible than the more common GI AY-3-8910 family of sound generators. Pokey sound effects have a unique sound that is easy to recognize once you know what to listen for. The Pokey chip consists of 4 general purpose frequency dividers (cascadable), serial I/O ports, varying length feedback-shift registers (polynomial counters) to create unique sound effects, a keyboard decoding matrix, an IRQ line that can trigger on 8 separate events, 8 potentiometer inputs, and a random number generator that is used for noise effects and also to provide a RANDOM register for program use. The pin-outs of Pokey are as follows: 1. GND 40. D2 2. D3 39. D1 3. D4 38. D0 4. D5 37. Audio Out 5. D6 36. A0 6. D7 35. A1 7. Master Clock 34. A2 8. Pot 6 33. A3 9. Pot 7 32. R/!W 10. Pot 4 31. CS1 11. Pot 5 30. !CS0 12. Pot 2 29. !Interrupt 13. Pot 3 28. Ser. Out 14. Pot 0 27. Clk. Out 15. Pot 1 26. Clk. In 16. !Key Read1 25. !Key Read2 17. Vcc 24. Ser. In 18. !Key 5 23. !Key 0 19. !Key 4 22. !Key 1 20. !Key 3 21. !Key 2 CS1 & !CS0 are 2 chip select lines that are used in address decoding to put Pokey on the bus. One can be tied to Vcc(CS1) or GND(!CS0) if you do not need both. The Master Clock in the Atari Home Computer is 1.79MHz, the CPU clock. The address lines of Pokey select the following registers: 00 AUDF1 - W 1st frequency divider POT0 - R Position of pot input 0 01 AUDC1 - W Each channel has a control register as follows: Bit 7,6,5 = Distortion 0-7 0 0 0 = 5 bit poly -> 17 bit poly 0 0 1 = 5 bit poly 0 1 0 = 5 bit poly -> 4 bit poly 0 1 1 = 5 bit poly 1 0 0 = 17 bit poly 1 0 1 = polys off - pure tone 1 1 0 = 4 bit poly 1 1 1 = polys off - pure tone Bit 4 = if 1, hold channel at vol level for D/A use Bit 3,2,1,0 = Volume POT1 - R Position of pot input 1 02 AUDF2 - W 2nd frequency divider POT2 - R Position of pot input 2 03 AUDC2 - W Control register 2 POT3 - R Position of pot input 3 04 AUDF3 - W 3rd frequency divider (used with AUDF4 for serial IO) POT4 - R Position of pot input 4 05 AUDC3 - W Control register 3 POT5 - R Position of pot input 5 06 AUDF4 - W 4th frequency divider POT6 - R Position of pot input 6 07 AUDC4 - W Control register 4 POT7 - R Position of pot input 7 08 AUDCTL W Master configuration for the sound channels Bit 7 = 17 or 9 bit poly counter (change noise sound) Bit 6 = Clock channel 1 with undivided clock Bit 5 = Clock channel 3 with undivided clock Bit 4 = Cascade dividers 2 and 1 (16 bit mode) Bit 3 = Cascade dividers 4 and 3 (16 bit mode) Bit 2 = Enable high-pass filter on channel 1, select frequency with channel 2 Bit 1 = Enable high-pass filter on channel 3, select frequency with channel 4 Bit 0 = Divided clock = clock/120 or clock/28 ALLPOT R Shows state of all 8 pot inputs (counting or done) 09 STIMER W Any non-zero value will start the dividers if they have been stopped KBCODE R Last key pressed Bit 7,6 = Modifier keys (Control & Shift on Atari Comp) 0A SKREST W Strobe this address to reset SKCTL bits 5-7 RANDOM R Returns the top 8 bits of the poly counter 0B POTGO - W Strobe this address to start testing the pots 0C unused 0D SEROUT W Put bytes to be sent serially here SERIN - R Read bytes received serially here 0E IRQEN - W Turn Pokey interrupts on and off Bit 7 = Special key ('BREAK' key on Atari Comp) Bit 6 = Any other key Bit 5 = Serial byte ready to read Bit 4 = Serial byte needed to send Bit 3 = Serial output done Bit 2 = Divider 4 reached 0 Bit 1 = Divider 2 reached 0 Bit 0 = Divider 1 reached 0 IRQST - R Determine what caused an interrupt - bits as above OF SKCTL - W Serial port control Bit 7 = Force break (zero state) in serial output Bit 6,5,4 = Serial mode 0 0 0 = Use external clock 0 0 1 = Use ex. clock for send, ch. 4 for read (A) 0 1 0 = Use channel 4 as clock 0 1 1 = undefined 1 0 0 = Use ch. 4 for send, ex. clock for read 1 0 1 = undefined 1 1 0 = Use ch. 2 for send, ch. 4 for read 1 1 1 = Use ch. 2 for send, ch. 4 for read (A) (A) = async. mode using ch. 4 as bit shift clock Bit 3 = Two tone mode (analog casette)/ Logic mode Bit 2 = Fast pot scan - less accurate pot reading Bit 1 = Enable keyboard scanning Bit 0 = Enable keyboard debounce SKSTAT R Serial Port Status Bit 7 = Serial frame error (SKREST clears bits 7,6,5) Bit 6 = Serial data in overrun Bit 5 = Keyboard overrun Bit 4 = Current bit at serial input port Bit 3 = Realtime version of KBCODE bit 6 (shift) Bit 2 = Key at KBCODE is still pressed Bit 1 = Serial byte not ready to read Bit 0 = Always 1